ISL12022MIBZ-T7A【PDF 21/31 页】IC RTC/CALENDAR TEMP SNSR 20SOIC

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Sheet目录2001

17页 18页 19页 20页 [21页]22页 23页 24页 25页

ISL12022M

FN6668.9

June 20, 2012

Revision History

The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you

have the latest Rev.

DATE

REVISION

CHANGE

May 15, 2012

FN6668.9 “Absolute Maximum Ratings” on page 5, Latch-up. Changed from:

Latch-up. . . . . . . . . . . . . .Class II Level A , passed at +85°C ambient with the

Level A latch-up criteria of 100mA or 1.5*VMAX input

Latch-up (Tested per JESD-78B, Class 2, Level A. . . . . . 100mA

Added new section header “OSCILLATOR ACCURACY” on page 6

Removed Min/Max of -5/5ppm for “Oscillator Stability vs Temperature” on page 6. Added typ of ±2ppm

Changed Min/Max for “Oscillator Initial Accuracy” on page 6 from -3/+3 ppm to -2/+8ppm

Added “Oscillator Accuracy after Reflow Cycle” on page 6.

Added notes 17, 18 cross references where required to above specs.

Added note 19 to “Oscillator Stability vs Voltage” on page 6.

Added notes 17, 18 and 19 to end of spec table on page 7.

“Layout Considerations” on page 26. Changed 1st sentence of 2nd paragraph from:

"The part of the package that has NC pins from pin 1 to 5 and from pin 16 to 20 contains the crystal." to "The part of

the package from pin 1 to 5 and from pin 16 to 20 contains the crystal."

October 31, 2011

FN6668.8 Converted to newest datasheet template.

Description, 1st paragraph, added “Backup battery current draw is less than 1.6A over the temperature range.”

Features: added bullet “1.6A Max Battery Current”

“Pin Descriptions” on page 2; added Ground pin row and separated Vdd pin.

Ordering Information table - Updated Tape & Reel note in Ordering Information to new standard "Add "-T*" suffix for

tape and reel." The "*" covers all possible tape and reel options.

Added shock, vibration in “Absolute Maximum Ratings” on page 5

IDD1 at 5V/3V limits changed from: 7/6A to: 15/14A

Power-Down Timing, added Vddsr+ as typical, with note 16.

Added note 16 for Vddsr+: "To avoid EEPROM recall issues, it is advised to use this minimum power up slew rate. Not

tested, shown as typical only."

“Oscillator Compensation” on page 12, text deleted: "These values can be overwritten by the user although this is not

suggested as the resulting temperature compensation performance will be compromised."

“Oscillator fail bit (OSCF)” on page 14: changed text from: "Oscillator Fail Bit indicates that the oscillator has

stopped." to: "Oscillator Fail Bit indicates that the oscillator has failed. The oscillator frequency is either zero or very

far from the desired 32.768kHz due to failure, PC board contamination or mechanical issues."

DSTADJ bit, removed: "DSTADJ can be set to "1" for instances where the RTC device is initialized during the DST

Forward period." Added: "It is read-only and cannot be written. Setting time during a DST forward period will not set

this bit to "1"."

Table 19 on page 20, FDTR changed from <2:0> to <4:0>

Added “Power Supply Considerations” on page 26

Updated “Package Outline Drawing” on page 31 from rev 2 to rev 3, due to the following changes: Top View: Corrected

"7.50 BSC" to "7.60/7.40" (no change from rev 2; error was introduced in conversion)

Changed "10.30 BSC" to "10.65/10.00" (no change from rev 2; error was introduced in conversion)

Side View: Changed "12.80 BSC" to "13.00/12.60" (no change from rev 2; error was introduced in conversion)

Changed "2.65 max" to "2.65/2.35" (no change from rev 2; error was introduced in conversion)

Changed Note 1 from "ANSI Y14.5M-1982." to "ASME Y14.5M-1994"

Updated to new POD format by moving dimensions from table onto drawing and adding land pattern

May 27, 2010

FN6668.7 Added CDM to “ESD Rating” on page 5

Added “Related Literature” on page 1

January 20, 2010

FN6668.6 Updated Note 2 in Ordering Information table from “These Intersil Pb-free plastic packaged products employ special Pb-

free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish,

which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are

MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-

020.” to “These Intersil plastic packaged products employ special material sets, molding compounds and 100% matte tin

plate plus anneal (e3) termination finish. These products do contain Pb but they are RoHS compliant by exemption 7 (lead

in high melt temp solder for internal connections) and exemption 5 (lead in piezoelectric elements). These Intersil RoHS

compliant products are compatible with both SnPb and Pb-free soldering operations. These Intersil RoHS compliant

products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of

IPC/JEDEC J STD-020.”

Changed "Pb-Free" on page 1 and page 3 Ordering Information: "RoHS Compliant"

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